1. Field of the Invention
This invention relates to a painting pattern generation system for painting a plurality of regions enclosed by outlines (or boundaries) and a pattern painting method using the system.
2. Description of the Prior Art
A painting method is commonly known by which a plurality of pattern interior areas enclosed only by outlines (or boundaries) are selectively painted based on an even-odd rule.
FIG. 1 is a block diagram of a painting pattern generation system which uses the even-odd method. The system comprises a local memory (or a bit-map memory) 11 including a first memory area A and a second memory area B, the size of which are matched to the size of a pattern to be generated, a pattern generating device 9 by which the contents of the first and the second memories are read out and then processed by a logical operation to generate a pattern, a central processing unit CPU 1 as a host CPU (or a processor) which can control the operation of the pattern generating device 9, and a main memory 3 and a font memory 5 connected to the host CPU 1.
In the painting pattern generation system, a white and a black pattern are expressed by two data units, "1" and "0".
Next, an example of the conventional pattern painting method based on the even-odd method will be explained with reference to FIGS. 2A to 2C.
In step 1, shown in FIG. 2A, the contents of the first and the second memories are initialized by the pattern generating device 9 under the control of the host CPU 1.
Next, in step 2, shown in FIG. 2B, the pattern generating device 9 draws outline data in the first memory A and provides flag data in the second memory B. The flag data is required for the painting operation and is generated by a predetermined rule.
Next, in step 3, shown in FIG. 2C, the pattern generating device 9 reads out the outline data and the flag data in the first and the second memories A and B, then calculates an exclusive OR (XOR) operation between two adjacent items of flag data along a scan line direction, which is a painting operation for the interior of an area enclosed by the outlines. At the same time, a logical OR operation between the result of the XOR operation and the outline data in the first memory A is carried out in the scan line direction. (This OR operation is a compensation operation for the painting operation.)
The result of the OR calculation is written on the same scan line in the second memory B.
Steps 1 to 3 are carried out for all scan lines on the outlines (or the closed curves which are generated by the outline data) involved in the pattern to obtain the completely painted pattern data. The completely painted pattern data is read out to the main memory 3 by the host CPU 1.
In order to execute a next pattern generating operation, the steps 1 to 3 described above are performed repeatedly at the required times.
However, there is a problem in the even-odd method in the prior art. For example, when there is a pattern having a plurality of closed curves (or boundaries) along the scan line direction shown in FIG. 3A, painted areas (the shaded portions shown in FIG. 3B) are provided alternately. In such a case, it is difficult to paint any required areas at random.
When a pattern having several required areas to be painted is obtained by using the system comprising the conventional pattern generation system (in which the first memory region A stores outline data and the second memory region B contains flag data) based on the even-odd rule, the resultant pattern data is required as shown in FIG. 4B. In addition, in the prior art, when the resultant pattern shown in FIG. 4C is required, by using the conventional pattern generation system, it is possible to generate the pattern with many processes. But the processes require much time and must be executed under the control of a host CPU. Each process can process only one segment which means a closed pattern.
The operation procedures above will now be explained with reference to FIGS. 5A to 5C.
First, in step 1, shown in FIG. 5A, the pattern generating device 9 draws outline data and flag data for segments 101 and 105 shown in FIG. 4A in the first and the second memories A and B which have already been initialized completely under the control of the host CPU 1. Then, the outline data and the painted pattern data is stored in the first and the second memories A and B, respectively, after completion of these painting operations.
Then, the host CPU 1 reads out the painted pattern data in the second memory B to be transferred to the main memory 3. Next, in a step 2 as shown in FIG. 5B, the pattern generating device 9 initializes the contents of the first and the second memories A and B, then draws the outline data and the flag data of the segment 103 shown in FIG. 4A in the first and the second memories A and B as the painting operation.
Next, the painted pattern data in the second memory B is transferred to the main memory 3 in the host CPU 1, as in step 1. A logical OR operation between the painted data transferred from the main memory 3 and the painted data which have been transferred in step 1 shown in FIG. 5A is performed, and the resultant data is stored in the main memory 3.
Next, in step 3, shown in FIG. 5C, the pattern generating device 9 initializes completely the contents of the first and the second memories A and B, then draws the outline from the outline data and the flag data of all of the segments as shown in FIG. 4A in the first and the second memories A and B. In step 3, the painting operation is not performed because there is no data to be painted. Accordingly, only the outline data in the first memory A is transferred to the main memory 3 in the host CPU 1. Then, the logical OR operation of the outline data and the data which has been stored in step 2 is executed, and the result of the operation is transferred to the main memory 3 under the control of the host CPU 1.
By the operations described above, the required data such as the data shown in FIG. 4C can be stored in the main memory 3. However, the painting operations described above require much time to obtain the required pattern data because these painting operations must access the host CPU 1 more frequently.
Accordingly, there is a problem in the prior art that the total time for the painting operations is long.